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White Electronic Designs
512Kx32 3.3V SRAM MODULE
FEATURES
Access Times of 15*, 17, 20ns Low Voltage Operation Packaging * 66-pin, PGA Type, 1.385 inch square Hermetic Ceramic HIP (Package 402) * 68 lead, Hermetic CQFP (G2), 22mm (0.880 inch) square (Package 500). Designed to fit JEDEC 68 lead 0.990" CQFJ footprint Organized as 512Kx32; User Configurable as 1Mx16 or 2Mx8 Radiation Tolerant with Epitaxial Layer Die Commercial and Industrial Temperature Ranges
WS512K32BV-XXXE
*ADVANCED
3.3V Power Supply BiCMOS TTL Compatible Inputs and Outputs Built-in Decoupling Caps and Multiple Ground Pins for Low Noise Operation Weight * WS512K32BV-XG2XE - 8 grams typical * WS512K32NBV-XH2XE - 13 grams typical
* This product is under development, is not qualified or characterized and is subject to change or cancellation without notice.
PIN CONFIGURATION FOR WS512K32NBV-XH2XE
TOP VIEW
1 I/O8 I/O9 I/O10 A13 12 WE#2 CS#2 GND I/O11 A10 A11 A12 VCC CS#1 NC I/O3 22 33 23 I/O15 I/O14 I/O13 I/O12 OE# A18 WE#1 I/O7 I/O6 I/O5 I/O4 I/O24 I/O25 I/O26 34 VCC 45
NO
A14 A15 A16 A17 I/O0 I/O1 I/O2 11
TR
OM EC
A6 A7 NC A8 A9 I/O16 I/O17 I/O18 44
CS#4
WE#4 I/O27 A3 A4 A5 WE#3 CS#3
EN
I/O31 I/O30 I/O29 I/O28
ED D
56
FO
NE R
I/O0-31 A0-18 OE# VCC GND NC
DE W
Address Inputs Chip Selects Output Enable Power Supply Ground Not Connected
IGN S
S
PIN DESCRIPTION
Data Inputs/Outputs
WE#1-4 Write Enables CS#1-4
A0 A1 A2 I/O23 I/O22 I/O21 I/O20 55 66
8 OE# A0-18
BLOCK DIAGRAM
WE#1 CS#1 WE#2 CS#2 WE#3 CS#3 WE#4 CS#4
GND I/O19
512K x 8
512K x 8
512K x 8
512K x 8
8
8
8
I/O0-7
I/O8-15
I/O16-23
I/O24-31
White Electronic Designs Corp. reserves the right to change products or specifications without notice. December, 1999 Rev. 2 1 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
WS512K32BV-XXXE
PIN CONFIGURATION FOR WS512K32BV-XG2XE TOP VIEW
NC A0 A1 A2 A3 A4 A5 CS#3 GND CS#4 WE#1 A6 A7 A8 A9 A10 VCC
PIN DESCRIPTION
I/O0-31 A0-18 WE#1-4
I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31
Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Power Supply Ground Not Connected
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
CS#1-4 OE# VCC GND NC
BLOCK DIAGRAM
WE#1 CS#1 OE# A0-18 512K x 8 512K x 8 WE#2 CS#2 WE#3 CS#3 WE#4 CS#4
512K x 8
512K x 8
CS#1
OE#
CS#2
A17 WE#2 WE#3 WE#4
VCC
A18
A12
A13
A14
A15
A16
A11
NC NC
8
8
8
8
I/O0-7
I/O8-15
I/O16-23
I/O24-31
The WEDC 68 lead G2 CQFP fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G2 has the TCE and lead inspection advantage of the CQFP form.
0.940"
White Electronic Designs Corp. reserves the right to change products or specifications without notice. December, 1999 Rev. 2 2 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
Parameter Operating Temperature Storage Temperature Signal Voltage Relative to GND Junction Temperature Supply Voltage Symbol TA TSTG VG TJ VCC -0.5 Min -40 -65 -0.5 Max +85 +150 4.6 150 4.6 Unit C C V C V CS# H L L L OE# X L X H X H L H
WS512K32BV-XXXE
TRUTH TABLE
WE# Mode Standby Read Write Out Disable Data I/O High Z Data Out Data In High Z Power Standby Active Active Active
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage Input High Voltage Input Low Voltage Symbol VCC VIH VIL Min 3.0 2.2 -0.3 Max 3.6 VCC + 0.3 +0.8 Unit V V V Parameter OE# capacitance WE#1-4 capacitance HIP (PGA) CQFP G2 CS#1-4 capacitance Data I/O capacitance
CAPACITANCE
(TA = +25C)
Symbol Conditions COE CWE Max Unit pF pF VIN = 0 V, f = 1.0 MHz 50 VIN = 0 V, f = 1.0 MHz 20 20 CCS CI/O VIN = 0 V, f = 1.0 MHz 20 VI/O = 0 V, f = 1.0 MHz 20 pF pF pF
Address input capacitance CAD VIN = 0 V, f = 1.0 MHz 50 This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS
(VCC = 3.3V 0.3V, VSS = 0V, TA = -40C to +85C)
Parameter Input Leakage Current Output Leakage Current Operating Supply Current (x 32 Mode) Standby Current Output Low Voltage Output High Voltage NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V Sym ILI ILO ICC x 32 ISB VOL VOH Conditions VIN = GND to VCC CS# = VIH, OE# = VIH, VOUT = GND to VCC CS# = VIL, OE# = VIH, f = 5MHz, VCC = 3.6V CS# = VIH, OE# = VIH, f = 5MHz, VCC = 3.6V IOL = 8mA IOH = -4.0mA 2.4 Min Max 10 10 480 110 0.4 Units A A mA mA V V
White Electronic Designs Corp. reserves the right to change products or specifications without notice. December, 1999 Rev. 2 3 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
AC CHARACTERISTICS
(VCC = 3.3V, TA = -40C to +85C)
Parameter Read Cycle Read Cycle Time Address Access Time Output Hold from Address Change Chip Select Access Time Output Enable to Output Valid Chip Select to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z 1. This parameter is guaranteed by design but not tested. *Advanced information. Symbol tRC tAA tOH tACS tOE tCLZ1 tOLZ1 tCHZ1 tOHZ1 2 0 7 7 0 15 7 2 0 -15* Min 15 15 0 Max Min 17 -17
WS512K32BV-XXXE
-20 Max 17 0 17 8 2 0 8 8 10 10 20 10 Min 20 20 Max
Units ns ns ns ns ns ns ns ns ns
AC CHARACTERISTICS
(VCC = 3.3V, TA = -40C to +85C)
Parameter Write Cycle Write Cycle Time Chip Select to End of Write Address Valid to End of Write Data Valid to End of Write Write Pulse Width Address Setup Time Address Hold Time Output Active from End of Write Write Enable to Output in High Z Data Hold Time 1. This parameter is guaranteed by design but not tested. *Advanced information. Symbol tWC tCW tAW tDW tWP tAS tAH tOW1 tWHZ1 tDH 0 -15* Min 15 10 10 8 12 0 0 2 8 0 Max Min 17 12 12 9 14 0 0 3 8 0 -17 Max Min 20 14 14 10 14 0 0 3 9 -20 Max Units ns ns ns ns ns ns ns ns ns ns
AC TEST CIRCUIT
Parameter
IOL Current Source
AC TEST CONDITIONS
Typ VIL = 0, VIH = 2.5 5 1.5 1.5 Unit V ns V V Input Pulse Levels Input Rise and Fall Input and Output Reference Level Output Timing Reference Level
D.U.T. Ceff = 50 pf
VZ
1.5V
(Bipolar Supply)
IOH Current Source
NOTES: VZ is programmable from -2V to +7V. IOL & IOH programmable from 0 to 16mA. Tester Impedance Z0 = 75 y. VZ is typically the midpoint of VOH and VOL. IOL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance.
White Electronic Designs Corp. reserves the right to change products or specifications without notice. December, 1999 Rev. 2 4 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
TIMING WAVEFORM - READ CYCLE
WS512K32BV-XXXE
tRC ADDRESS tAA
tRC ADDRESS tAA tOH
OE# CS# tACS tCLZ tCHZ
DATA I/O
PREVIOUS DATA VALID
DATA VALID
DATA I/O
tOE tOLZ
tOHZ DATA VALID
READ CYCLE 1 (CS# = OE# = VIL, WE# = VIH)
HIGH IMPEDANCE READ CYCLE 2 (WE# = VIH)
WRITE CYCLE - WE# CONTROLLED
tWC ADDRESS tAW tCW CS# tAS WE# tWHZ DATA I/O tDW DATA VALID WRITE CYCLE 1, WE# CONTROLLED tWP tOW tDH tAH
WRITE CYCLE - CS# CONTROLLED
tWC ADDRESS tAW tAS CS# tWP WE# tDW DATA I/O DATA VALID WRITE CYCLE 2, CS# CONTROLLED tDH tCW tAH
White Electronic Designs Corp. reserves the right to change products or specifications without notice. December, 1999 Rev. 2 5 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
WS512K32BV-XXXE
PACKAGE 402: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H2)
35.2 (1.385) 0.38 (0.015) SQ
PIN 1 IDENTIFIER SQUARE PAD ON BOTTOM
25.4 (1.0) TYP
5.7 (0.223) MAX 3.81 (0.150) 0.1 (0.005) 2.54 (0.100) TYP 1.27 (0.050) 0.1 (0.005) 0.76 (0.030) 0.1 (0.005) 15.24 (0.600) TYP 1.27 (0.050) TYP DIA 0.46 (0.018) 0.05 (0.002) DIA 25.4 (1.0) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice. December, 1999 Rev. 2 6 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
WS512K32BV-XXXE
PACKAGE 500: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2)
25.1 (0.990) 0.25 (0.010) SQ 22.4 (0.880) 0.25 (0.010) SQ 5.1 (0.200) MAX 0.25 (0.010) 0.1 (0.002)
Pin 1
0.25 (0.010) REF
24.0 (0.946) 0.25 (0.010) 1 /7 1.0 (0.040) 0.127 (0.005)
R 0.25 (0.010) 0.25 (0.010) 0.127 (0.005)
23.87 (0.940) REF
DETAIL A
1.27 (0.050) TYP 0.38 (0.015) 0.05 (0.002) 20.3 (0.800) REF SEE DETAIL "A"
The WEDC 68 lead G2 CQFP fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G2 has the TCE and lead inspection advantage of the CQFP form.
0.940" TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice. December, 1999 Rev. 2 7 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
ORDERING INFORMATION
W S 512K 32 X B V - XXX X X E X
LEAD FINISH: Blank = A = Gold plated leads Solder dip leads
WS512K32BV-XXXE
E = Epitaxial Layer DEVICE GRADE: I = Industrial C = Commercial
-40C to +85C 0C to +70C
PACKAGE TYPE: H2 = Ceramic Hex-In-line Package, HIP (Package 402) G2 = 22 mm Ceramic Quad Flat Pack, CQFP (Package 500) ACCESS TIME (ns) Low Voltage Supply 3.3V 10% BiCMOS
NO
TR
OM EC
DE EN
FO D
SRAM
IMPROVEMENT MARK: N = No Connect at pin 21 and 39 in HIP for Upgrades ORGANIZATION, 512Kx32 User configurable as 1Mx16 or 2Mx8
NE R
DE W
IGN S
S
WHITE ELECTRONIC DESIGNS CORP.
White Electronic Designs Corp. reserves the right to change products or specifications without notice. December, 1999 Rev. 2 8 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com

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